Switch out Makefile

Uebung 4/Uebung4_2/makefile

@@ -1,14 +1,51 @@
-CC = g++
-FLAGS = -I
-OBJECT_FILES = main.o pbEntry.o hashTable.o
 
-all: main
+# Name of the binary for Development
+BINARY = main
+# Name of the binary for Release
+FINAL = prototyp
+# Object files
+OBJS   = pbEntry.o hashTable.o main.o
+# Compiler flags
+CFLAGS = -Werror -Wall -std=c++17 -fsanitize=address,undefined -g
+# Linker flags
+LFLAGS = -fsanitize=address,undefined
+#Which Compiler to use
+COMPILER = c++
 
+
+# all target: builds all important targets
+all: binary
+
+final : ${OBJS}
+	${COMPILER} ${LFLAGS} -o ${FINAL} ${OBJS}
+
+binary : ${OBJS}
+	${COMPILER} ${LFLAGS} -o ${BINARY} ${OBJS}
+
+# Links the binary
+${BINARY} : ${OBJS}
+	${COMPILER} ${LFLAGS} -o ${BINARY} ${OBJS}
+
+
+# Compiles a source-file (any file with file extension .c) into an object-file
+#
+# "%" is a wildcard which matches every file-name (similar to * in regular expressions)
+# Such a rule is called a pattern rule (because it matches a pattern, see https://www.gnu.org/software/make/manual/html_node/Pattern-Rules.html),
+# which are a form of so called implicit rules (see https://www.gnu.org/software/make/manual/html_node/Implicit-Rules.html)
+# "$@" and "$<" are so called automatic variables (see https://www.gnu.org/software/make/manual/html_node/Automatic-Variables.html)
+%.o : %.cpp
+	${COMPILER} -c ${CFLAGS} -o $@ $<
+
+
+# Rules can not only be used for compiling a program but also for executing a program
+run: ${BINARY}
+	./${BINARY}
+
+
+# Delete all build artifacts
 clean :
-	rm -rf main main.exe *.o
+	rm -rf ${BINARY} ${OBJS}
 
-%.o: %.c $(DEPENDENCIES)
-	$(CC) -o $@ $< $(FLAGS).
 
-main: $(OBJECT_FILES)
+# all  and clean are a "phony" targets, meaning they are no files
-	$(CC) -o $@ $^ $(FLAGS).
+.PHONY : all clean